Priyank Faldu

About Me

I have recently completed PhD from the School of Informatics at The University of Edinburgh advised by Prof. Boris Grot. My research interests are broad-ranging in the field of computer systems design, with specific focus on computer architecture, performance modeling and at the intersection of software and hardware; such as the co-design of high-performance hardware architectures for emerging applications and the requisite application analysis and optimization for the target architecture. In my career spanning PhD and ~4 years of industry experience, I have predominantly worked on projects related to performance modeling of CPU/GPU architectures and cache subsystems. The projects also covered various aspects of systems research that included software-hardware co-design [HPCA'20, Patent #10,417,134], design of novel microarchitecture mechanisms [PACT'17], simulation driven bottleneck/efficiency analysis of microarchitecture components [WDDD'16], characterization and software optimization of emerging applications for existing hardware architecture [IISWC'19], and accelerating applications using GPU via OpenCL/CUDA and other parallel programming paradigms [Patent #9,727,382]. Several of these projects led to successful publications in top-tier architecture conferences, patents, a grant and an award. My PhD research predominantly explored high-performance cache management mechanisms for Last-Level Cache of commodity CPU processors. My thesis mainly contributes by advocating the need for domain-specialized cache management for general-purpose processors in the age of big data. The argument is further augmented by the proposal of a practical software-hardware co-design cache management scheme for the domain of graph analytics, providing highly increased performance over the state-of-the-art domain-agnostic schemes.

Peer-Reviewed Conference Publications

Domain-Specialized Cache Management for Graph Analytics [HPCA'20]
Priyank Faldu, Jeff Diamond and Boris Grot
In Proceedings of the 26^th International Symposium on High-Performance Computer Architecture, Feb. 2020.
Paper Slides Code

A Closer Look at Lightweight Graph Reordering [IISWC'19]
Priyank Faldu, Jeff Diamond and Boris Grot
In Proceedings of the International Symposium on Workload Characterization, Nov. 2019.
Paper Slides Code

Leeway: Addressing Variability in Dead-Block Prediction for Last-Level Caches [PACT'17]
Priyank Faldu and Boris Grot
In Proceedings of the 26^th International Conference on Parallel Architectures and Compilation Techniques, Sep. 2017.
Paper Slides Code

Peer-Reviewed Workshop Publications

POSTER: Domain-Specialized Cache Management for Graph Analytics [PACT'19]
Awarded first place in the ACM Student Research Competition (SRC)
Priyank Faldu, Jeff Diamond and Boris Grot
In Proceedings of the 28^th International Conference on Parallel Architectures and Compilation Techniques, Sep. 2019.
Paper Poster

Reuse-Aware Management for Last-Level Caches [CRC'17]
Priyank Faldu and Boris Grot
In 2^nd International Workshop on Cache Replacement Championship, co-located with ISCA, Jun. 2017.
Paper Slides Code

LLC Dead Block Prediction Considered Not Useful [WDDD'16]
Priyank Faldu, Jeff Diamond and Boris Grot
In 13^th International Workshop on Duplicating, Deconstructing and Debunking, co-located with ISCA, Jun. 2016.
Paper Slides

Talks/Posters

Software-Hardware Co-Design to Improve Cache Locality for Graph Analytics
Priyank Faldu
Invited Talk at Georgia Institute of Technology, Atlanta, USA, Sep. 2019.

Caching In on the Skew in Graph Analytics
Priyank Faldu
Invited Talk at AMD Research, Austin, USA, Sep. 2019.

A Case for Domain-Specialized Cache Management for Graph Analytics
Priyank Faldu, Boris Grot, Jeff Diamond and Avadh Patel
Poster at 3^rd ARM Research Summit, Cambridge, UK, Sep. 2018.

Challenges in Scaling Up Graph Analytics
Priyank Faldu and Boris Grot
Talk at 3^rd Annual UK System Research Challenges Workshop, Northumberland, UK, Mar. 2018.
Slides

Patents

Cache Memory Architecture and Policies for Accelerating Graph Algorithms
Priyank Faldu, Jeff Diamond and Avadh Patel
Patent ID: US20180129613A1, Assignee: Oracle International Corporation, Publication: May 2018
Link

Parallelization Method and Electronic Device Based on Profiling Information
Jaehan Koh, Anuradha Oberoi, Gopalakrishna Puligedda Sharma, Raghavan Velappan and Priyank Faldu
Patent ID: US20160004570A1, Assignee: Samsung Electronics Co., Ltd., Publication: Jan. 2016
Link

Grants

Efficient Scale-Up Graph Processing on Future Memory Systems [Oracle ERO Award]
Co-authored the grant proposal; PI: Boris Grot; Award: $76,000; Year: 2017

Professional Services

Journal Reviewer
Computer Architecture Letters (CAL)

Organizing Committee Member
Web Co-chair in ISCA'18

Education

Oct. 2014 – Jun. 2020 Doctor of Philosophy
School of Informatics , The University of Edinburgh
Thesis: Addressing Variability in Reuse Prediction for Last-Level Caches
Advisor: Prof. Boris Grot

Jul. 2008 – Jun. 2010 Master of Technology
Department of Computer Science and Engineering , IIT Kanpur
CGPA: 10/10
Thesis: CUDA-LF : A Lock-Free Data Structure Library for GPGPU
Advisor: Prof. Mainak Chaudhuri

Jul. 2004 – May 2008 Bachelor of Technology
Department of Computer Engineering , Nirma University
CGPA: 8.39/10

Work Experience

Bangalore, India Samsung R & D Institute
Jul. 2013 – Aug. 2014 Lead Engineer

Bangalore, India Intel Corporation
May 2011 – Jul. 2013 Graphics Hardware Engineer

Bangalore, India Google Inc
Jul. 2010 – Mar. 2011 Software Engineer

Internships

Austin, U.S.A. Oracle Labs
May 2016 – Sep. 2016 Research Intern

Gandhinagar, India Tata Consultancy Services
Jan. 2008 – Apr. 2008 Software Engineer

Awards

Awarded first place in the ACM Student Research Competition at PACT 2019 for our work on a hardware/software co-design to accelerate graph analytics.

Received Academic Excellence Award at IIT Kanpur for the year 2008-09.

Topper of the M.Tech. batch 2008-10, IIT Kanpur.

All India Rank 263 (of 18224 candidates) in Graduate Aptitude Test in Engineering (GATE) 2008 for the Computer Science discipline.

Teaching Experience

Tutoring at The University of Edinburgh for
Computer Architecture
Introduction to Computer Systems

Teaching Assistant at The University of Edinburgh for
Operating Systems
Parallel Architectures
Introduction to Computer Systems

Tutoring at IIT Kanpur for
Fundamentals of Computing

Teaching Assistant at IIT Kanpur for
Fundamentals of Computing
Operating Systems

Mentoring Experience

Honours Project at The University of Edinburgh
Sep. 2017 – Apr. 2018 Elitsa Bankova, The University of Edinburgh
Sep. 2016 – Mar. 2017 Keith Donaldson, The University of Edinburgh

Research Internship at The University of Edinburgh
Jul. 2018 – Aug. 2018 Kuntai Du, Peking University
Jun. 2018 – Nov. 2018 Adam McCabe, The University of Edinburgh
Jul. 2017 – Jan. 2018 Pramod Chunduri, IIT Kanpur

Industry Internship at Samsung R & D Institute, Bangalore
May 2014 – Jul. 2014 Rajat Sinha, Indian Institute of Technology Guwahati

Industry Internship at Intel Corporation, Bangalore
Jun. 2012 – Apr. 2013 Shruti Pavagadhi, Nirma University
May 2011 – May 2012 Akhila Surishetti, National Institute of Technology Warangal

Latest News

Jun. 2020
It's official. I am Dr. Priyank Faldu now :)

Apr. 2020
I successfully defended my PhD thesis (subject to minor corrections) on Addressing Variability in Reuse Prediction for Last-Level Caches.

Jan. 2020
I submitted my PhD thesis. Mike O'Boyle (internal) and Gabe Loh (external) have kindly agreed to serve on the examination committee.

Nov. 2019
Our HPCA'20 paper introduces GRASP to make a case for Domain-Specialized Cache Management for Graph Analytics.

Sep. 2019
Our work on a hardware/software co-design to accelerate graph analytics was awarded first place in the Student Research Competition at PACT'19.

Aug. 2019
Our IISWC'19 paper takes A Closer Look at Lightweight Graph Reordering.

Aug. 2019
Packed trip planned for September -- will be attending ARM Research Summit in Austin, followed by invited talks at AMD Research in Austin and at Georgia Tech in Atlanta.

Jul. 2019
My first peer-review -- received an invitation from Computer Architecture Letters (CAL) to review a manuscript.

Jul. 2019
I will be presenting a poster to advocate Domain-Specialized Cache Management for Graph Analytics at PACT'19.

May 2018
I will be presenting a poster at ARM Research Summit in Sep. in Cambridge.

May 2018
I will be attending ISCA in June in Los Angeles -- looking forward to hearing what the legends of the field have to say in their Turing Lecture.

May 2018
Oracle has submitted a patent application for our work on Cache Memory Architecture and Policies for Accelerating Graph Algorithms.

Mar. 2018
I will be collaborating with Intel on their Hierarchical Identify Verify & Exploit (HIVE) program this summer.

Mar. 2018
I will be highlighting Opportunities and Challenges in Scaling Up Graph Analytics at the UK System Research Challenges Workshop on Mar. 22 in Northumberland.

Jun. 2017
Oracle has generously funded us to work on Efficient Scale-Up Graph Processing on Future Memory Systems.

Jun. 2017
Our PACT'17 paper introduces Leeway to Address Variability in Dead-Block Prediction for Last-Level Caches.

May 2017
My first time serving on an organizing committee of a conference -- I will be serving as the Web Co-Chair of ISCA'18.

May 2017
Leeway has been selected to compete in the Cache Replacement Championship at ISCA'17.

May 2016
Our WDDD'16 paper Considers LLC Dead Block Prediction NOT Useful.

Feb. 2016
I will be spending this summer in the USA as a Research Intern at Oracle Labs, Austin.

Apr. 2015
I will be attending ACACES Summer School in July in Fiuggi, Italy.

Oct. 2014
My first conference visit of the PhD program -- I will be attending MICRO in Dec. in Cambridge.

Oct. 2014
I have started my PhD program under the supervision of Boris Grot at The University of Edinburgh. Vijay Nagarajan is my secondary advisor.